Viewing profile — volta83
volta83
HN member- Joined
- Thu, Jan 28, 2021, 2:49 PM UTC
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About volta83
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Recent public activity
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Comment #29653125
This might be an error on both sides. They want to study how websites handle GDPR and CCPA, and that's probably what they submitted. The IRB reasoned that "websites are not people"…
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Comment #29577275
A simple way to do this is to: MyNestedMaxHeap(T, Ord) = MaxHeap(MaxHeap(T, Ord), Ord) such that when using MyNestedMaxHeap only one Ord type can be passed.
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Comment #29570090
> You need some way to enforce that the orderings are the _same_ Just require that the Ord type is the same for all heaps ? MaxHeap(MaxHeap(T, MyOrd), MyOrd) uses the same ordering…
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Comment #29539114
> If you didn't have canonical implementations, you would have to give up being able to write safe & efficient data-structures like this. No? Just make the type generic on the orde…
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Comment #29528720
I agree with you, which is why I don't really understand what the point of improving FP64 perf by 4x is, if that is not the bottleneck for many apps. Per node, a 4x MI250X node has…
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Comment #29528706
Makes sense. Comparing nodes with 2x or 4x MI250X vs 4x or 8x A100-80 it doesn't really seem that there is any speed up at all for memory bound apps.
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Comment #29528679
Then you must be extremely bad at rust.
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Comment #29507658
Many in the core team don’t code, don’t even know Rust well, etc.
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Comment #29482253
I wonder how they manage to keep the FP64 units busy. Seems this is an HPC product, but many HPC apps are memory bound. So to improve FP64 perf by 4 one might need to improve DRAM …
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Comment #29433930
Ideally it would be a constitutional ammendent, stating that privacy is a right of every citizen, and a human right. Legislation to the right to encryption would then just follow f…
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Comment #29428193
Its not completely unrelated. Excess mortality is the only fact that we know for sure given that every country counts "COVID deaths" differently. Given that there is a statistical …
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Comment #29428187
Right, but all architectures can handle many combinations of instructions in 1 cycle, so this is not really a great proxy for that. Same for code size. If the instructions are half…
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Comment #29428183
8x 2 byte instructions (16 bytes) lead to smaller code than 4x 8 byte instructions (32 bytes). Counting number of instructions isn't really a good metric for that either.
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Comment #29423593
> DPU SmartNICs, Which other companies beyond NVIDIA sell DPUs ?
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Comment #29423534
I just showed the data, and summarized that according to the data, people in the EU had better chances. I never claimed that this data is the result of COVID policies. This is some…
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Comment #29423474
The US didn't act as one entity either.
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Comment #29423364
Can you change the "shape of the vectors? e.g. 1x16 vs 4x4 to support vectors and matrices?
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Comment #29423238
> RISC-V is faster.. I find it funny that you make the same pitfall than the author did. Faster on which CPU? The author doesn't measure on any CPU, so here there are dozens of peo…
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Comment #29423179
The CPU executes the two (or more) dependent instructions "as if" they were one, e.g., in 1 cycle. The CPU has a frontend, which has a decoder, which is the part that "reads" the p…
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Comment #29416684
Good question. Excess mortality in the USA and the EU in 2020 were ~470k and ~580k deaths. The population of the USA and the EU in Jan 2020 was ~329 and ~447 million. The excess mo…
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Comment #29378411
Running on soft cores.
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Comment #29360216
You start with BLAS being a factor 2 off, and then go to PETSc, and are another couples of factors off, and then the actual app the scientist wrote, which many use all of the above…
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Comment #29360170
I think that right now, there is sufficient motivation to implement enough of this to be able to try it out, and then see how it actually behaves in practice. But Rust works on a r…