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tsmi

HN member
Joined
Sun, Mar 20, 2022, 6:29 PM UTC
HN karma
27
Public activity
16 items

About tsmi

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Recent public activity

  1. comment
    Comment #30781326

    I do totally agree with the comment, and even upvoted it, but in some sense an HDL does 'want to be procedural'. For example: Procedure to make brick wall: For brick in wheel-barro…

  2. comment
    Comment #30780426

    > The main point of verilog is to simulate digital logic I disagree. A HDL, which verilog is an instance of, provides a precise description of a digital machine. Once you have that…

  3. comment
    Comment #30780245

    That’s not exactly the right way to think about it. In HDL, you’re writing an algorithm, but the algorithm produces a physical device, not a computation. It’s like programming a ma…

  4. comment
    Comment #30761666

    Modern OoO CPUs solve the need for more physical registers than logic registers with renaming. https://docs.boom-core.org/en/latest/sections/rename-stage.h...

  5. comment
    Comment #30760203

    One advantage of SkyWater opening its PDK is Universities are starting to back fill all the hardware that is missing. Here's a SerDes from Purdue. I don't think this particular des…

  6. comment
    Comment #30758521

    Gotcha. Did you run into any issues with yosys given that it has limited system verilog support? Ibex needed to add a pass with sv2v https://github.com/lowRISC/ibex/tree/master/syn…

  7. comment
    Comment #30758227

    > you will need exact "-mcpu" for decent performance For some definitions of decent, I think that ship has sailed. https://clang.llvm.org/docs/CrossCompilation.html -target The tri…

  8. comment
    Comment #30757879

    I personally am not into the verilog specific books. For me HDLs are hardware description languages, so first you learn to design digital hardware, then you learn to describe them.…

  9. comment
    Comment #30757749

    Have you considered making an ASIC of your design? https://efabless.com/open_shuttle_program

  10. comment
    Comment #30757709

    If you're at the point in your career where you're not sure which is the right textbook then "A Quantitative Approach" is likely to be really tough to get through. Computer Organiz…

  11. comment
    Comment #30756820

    I only brought up the binary size thing to give a concrete example based off the article and the parent's comment. I am totally sure the situation is fluid and changing. My high le…

  12. comment
    Comment #30756508

    It's not so much "tricks" that one needs to look out for. The compiler has just tons of internal heuristics on when and when not to apply various code transformations. Those heuris…

  13. comment
    Comment #30745874

    I’m sure that’s what the team that invented segment registers said too. The question is does it make sense to add these to the ISA long term? In the short term, given die density a…

  14. comment
    Comment #30745552

    I agree mostly with Keller's take but I think he left of one key factor, the quality of the software tool chain. The x86 tool chains are amazing. They're practically black magic in…

  15. comment
    Comment #30745327

    Instruction byte count matters quite a lot when you're buying ROM in volume. And today, the main commercial battleground for RISCV is in the microcontroller space where people care…

  16. comment
    Comment #30745293

    People argue over these minimal differences for good reasons. If = binary size, and I'm buying ROM in volume to hold that binary, +10% ROM address space can easily cost more than t…