Viewing profile — tryp

I found this an interesting look into The US Forestry service's philosophy of road management through the lens of Washington State's Olympic National Forest. "The Forest Service – …

Some folks are just not TradeMarksters. They'll teach you that Intel makes processors that implement x86 and amd64 instruction sets. You can Google things on DuckDuckGo. They'll bl…

BIOS is often able to set mask bits in the CPU or chipset's pci bridges that prevent the devices from being reported to the OS. Before loading additional code like user DXEs or boo…

I love that the instruction decode unit's ability to command a flush on branch mispredicts is represented in the diagram as a toilet.

As a longtime browser of cross-referenced source generated by LXR [0] I found this article on their new implementation of the backend interesting. [0] http://elixir.free-electrons.…

The researchers' writeup, in a very fun form, can be found at https://rol.im/securegoldenkeyboot/ With text as follows for those whom the joviality of the original presentation is …

Toward the end of that slide deck, in the "Slowing Brute Force" section, there the following slide: > Argon2 ensures that both defenders and attackers hash passwords on the same pl…

It actually resides in the pch. The processor is called the management engine. In newer platforms, it gets to decide if the processor even gets to see the bios executable code.

I couldn't find much data on the Curie module, but it looks like the only pins required are power and slow io, so I can't imagine it's a super dense bga or anything. Even on the hi…

A few years ago I implemented the storage system for a special-purpose diagnostic camera. The specification defined (very long) filenames for the saved images using a timestamp and…

I'm not sure which ones you're referring to, but the NVDIMMs I'm familiar with [0] are are normal DRAMs with an additional hold-up supercap, controller, and flash. When power goes …

Of course the firmware could hash itself. The question is what value is there in trusting and untrusted component to tell you it's trustworthy.

>Why can't the HDD vendors publish a md5/sha1 hash of the firmware so we know what the value should be? Because the only way to actually verify the hash of the firmware is to conne…

The most likely explanation is that 64Mb (8MB) was the highest density part available in the footprint (SOIC-8?) at the time of manufacture and was priced at a significant premium …

By mundane coincidence, I discovered uefi-firmware-parser yesterday. Along with a radare2 session, it made it much easier to find a null-pointer dereference in an Intel FSP binary …

(U)EFI is essentially a little OS that eventually loads the OS that runs the software you care about. Intel sponsors most of the core OS code (mirrored) at: https://github.com/tian…

The best place to look is probably Coreboot. It's the boot firmware used by Google Chromebooks. (Github mirror links used here for politeness to the project's servers.) Taking Inte…

An invalid or debug instruction causes the processor to throw an exception and jump to a specific address where "handler" code should exist. This is managed by the OS, so in this c…

There is typically only one (or a small set) of hardware instruction pointer breakpoints. Every time the CPU is about to execute an instruction, it compares IP to the IP breakpoint…

To be a bit more explicit, using a separate httpd and application server allows a division of labor between the resource-bound task of handling the request + building the response …

dmesg output mentions Armada XP pinctrl and xor engine too.

I totally agree about micros. They are wonderfully nice and tidy for small, well defined problems. I've had extremely satisfying success using them for communications glue, motor c…

I am truly excited that there is a push to popularize FPGAs. They often allow a fundamentally different approach to problems and afford a massive improvement in efficiency and flex…