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Just tested a i4i.32xlarge: $ lsblk NAME MAJ:MIN RM SIZE RO TYPE MOUNTPOINTS loop0 7:0 0 24.9M 1 loop /snap/amazon-ssm-agent/7628 loop1 7:1 0 55.7M 1 loop /snap/core18/2812 loop2 7…

This is for 8 SSDs and a single modern PCIe 5.0 has better specs than this.

These settings control writing back modified pages. The experiments in the paper are read-only. With writes the situation is even worse than shown in the paper (though tuning these…

This would be exactly the kind of innovation we would need in computer science. Instead we often get stuck in local minima (in this case a 40-year old POSIX interface) without real…

Even after watching these videos and reading lots of articles on the topic, I still find the full C++ memory model extremely hard to understand. However, on x86 there are actually …

Everyone interested in the history of computing should read The Dream Machine by M. Mitchell Waldrop. The book pretends to be the biography by a little-known, but highly-influentia…

Well, the biggest Ivy Bridge EX has 15 cores! There's speculation that the 18 core Haswell-EPs are actually Haswell-EX dies that Intel wants to get rid as fast as possible because …

fruit

But cold caches are an unrealistic assumption. The top-most levels of a tree will always be in cache, unless you almost never access them -- in which case there's no problem either…