Live data from Hacker News

Viewing profile — scottlegrand

scottlegrand

HN member
Joined
Wed, May 11, 2016, 4:45 AM UTC
HN karma
83
Public activity
13 items

About scottlegrand

No profile information was provided.

Recent public activity

  1. comment
    Comment #12493160

    Some of us are... https://blogs.aws.amazon.com/bigdata/post/TxGEL8IJ0CAXTK/Gen...

  2. comment
    Comment #12488020

    Or as Urs Hoezel would say: "advancing Moore's Law by 7 years(tm)..." Badum ba bum bum... And given Frank Seide et al. demonstrated 1-bit SGD in 2014 ( https://www.microsoft.com/en…

  3. comment
    Comment #12326945

    Here's your answer for GROMACS (and it sucks)... http://www.prace-ri.eu/IMG/pdf/wp120.pdf Even so, right now, little would please me more technologically than a competitive Xeon Ph…

  4. comment
    Comment #12312312

    I prefer to look at it the other way, why don't you point out an existing and important chemistry application where KNL bested its contemporary GPUs, say the best of Knight's Corne…

  5. comment
    Comment #12312133

    Except that up to now at least, CUDA IMO remains the best abstraction for programming multi-core: subsuming away multiple threads, SIMD width, and multiple cores into the language …

  6. comment
    Comment #12301917

    Not even wrong. I have two PCs with 4 Titan X (Maxwell) GPUs and a third PC with 4 Titan X (Pascal) GPUs. Both of these systems are available today (I built them myself, total BOM …

  7. comment
    Comment #12260723

    Yep, NVIDIA. Nervana's dedicated ASIC will deliver 55 (mostly) int16 TOps in 2017. In contrast, the two Titan XP GPUs I bought last week for a total of $2400 deliver 44 such TOps. …

  8. comment
    Comment #12259194

    I figured Nervana was mostly dead if they were stuck at 28 nm I figured Intel was down and out in Santa Clara without a strong deep learning play That all changed today. Intel has …

  9. comment
    Comment #11938257

    Not to mention they all solve problems for which the training sets lie on low-dimensional manifolds within a very high-dimensional space. And this brings about arbitrary failures w…

  10. comment
    Comment #11674635

    Absolutely 100% agree, but at the same time, I think we will ultimately need to build and evaluate models that can span the memory of more than one processor. I don't think a singl…

  11. comment
    Comment #11672964

    Thanks for that! And boy, I wish I had the resources the TensorFlow team has to build standards like this and also to write their own custom CUDA compiler. I do want the multi-dime…

  12. comment
    Comment #11672736

    It's more than that, and it's in use in production at Amazon. 8 TitanX GPUs can contain networks with up to 6 billion weights. As Geoffrey Hinton once said: "My belief is that we’r…

  13. comment
    Comment #11672712

    Lead author of DSSTNE here... 1. DSSTNE was designed two years ago specifically for product recommendations from Amazon's catalog. At that time, there was no TensorFlow, only Thean…