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pavehawk2007

HN member
Joined
Fri, Sep 27, 2019, 5:09 PM UTC
HN karma
651
Public activity
60 items

About pavehawk2007

Proprietor of the Adventures of OS blog: https://blog.stephenmarz.com

Recent public activity

  1. comment
    Comment #31945459

    AIA is still a work in progress. The last draft release was 18 days ago, and it is at version 0.3.0-31. Verify here: https://github.com/riscv/riscv-aia/releases As the article ment…

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    Comment #27266327

    A and T are "caller saved", meaning that if I want their value after I make a function call, I, the caller, must save the registers. So, li t0, 10 call somefunc # Must consider t0 …

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    Comment #25270636

    I don't understand how you get that SATP is a non-leaf PTE. SATP is a register, and a fence is for memory ordering. A register is a particular kind of memory, but in this context, …

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    Comment #25268450

    Here's the specification's recommended use of SFENCE.VMA, which is just a fancier version of what I wrote above: Page 66 and 67: The following common situations typically require e…

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    Comment #25268148

    I don't think it's as cut and dry as "execute sfence.vma every time you write to SATP" as you say for the following reasons. 1. The sfence.vma is much like a TLB flush. Just like a…

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    Comment #24902189

    Properitary = custom...it just means that it's particular to a single chip manufacturer. They have set aside opcode space for doing just that. RISC-V can't forecast everything some…

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    Comment #24901795

    To my knowledge, and looking at http://riscv.org , this is supposed to be an open-ISA (instruction set architecture). Their specification allows chip manufacturers to write their o…

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    Comment #24811585

    Do you mean like a hardware board for educational purposes? I use the Sipeed Maixduino (or Maix Bit) for my classes. The problem with these boards is there is a lot of esoteric, no…

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    Comment #24043099

    I've been trying to use the Sipeed Maixduino. It's much like the hifive1 except it uses the Kendryte K210, which is a fully supported RV64GC dual-core. It even supports supervisor …

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    Comment #24042977

    I'm writing this from the OS's perspective. Linux abstracts this away, but we have to do it to get the same abstraction. You can see under the user space portion how simple it is t…

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    Comment #24042645

    I think until they get into the mass production market, risc-v will be fairly expensive compared to the Rpi. Take a look at the full stack Hifive Unleashed ($1000) or the cheaper H…

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    Comment #23870067

    I'm assuming LPDDR? I think the goals between the two are a bit different. I think that embedded gets quite messy since it's particularly targeted. Thanks for letting me know of yo…

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    Comment #23862078

    Wonder if this spec will make it easy for embedded systems to catch up. It always seems like they lag behind what's cutting edge. Maybe that's a cost/benefit analysis.

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    Comment #23862060

    Rust has come a LOOOOOONG way. I'm really impressed with what they've accomplished in just a short time.

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    Comment #23849361

    I loved this series. I even made a Rust version of it with very little compilers knowledge (this one is written in Python): http://github.com/sgmarz/ttrust