Viewing profile — nbingham

I'm working on a compiler for asynchronous circuits. Once I have modules, placement, and routing working, I'll have an MVP. Hopefully, this will allow people without any computer e…

I tested two C++ implementations of Calendar Queues again the standard library priority_queue. The first implementation uses a deque as a backing container and then fills the calen…

I worked on a similar project - the Stanford braindrop chip. It's a really interesting technology, what happened is that most people don't really know how to train those systems. T…

The reason we ended up with digital logic is because of noise. Hysteresis from digital gates was the only way to make such large systems from such small devices without all of our …

Rajit has since moved to Yale and has made quite a bit of progress on the tooling problems https://github.com/asyncvlsi/actflow https://avlsi.csl.yale.edu/act/doku.php https://avls…

https://www.congress.gov/bill/117th-congress/house-bill/963

I think there's been a misunderstanding. You're right, and I don't intend to condemn all of async, or even QDI for that matter :) I am doing my PhD on it, so I do think there is pr…

Ideally, none. We're leaning toward FPGAs and CGRAs to accelerate tight inner loops. This means that it will have a huge effect on compilers. They will have to compile from a contr…

I was specifically talking about dual rail domino QDI. When you compare the typical dual rail domino QDI adder found in Andrew Lines thesis against a typical clocked carry lookahea…

Hence my thesis :)

Synchronous design tools are very good at making all of the pipeline stages have about the same logic depth, which is generally 6-8 transitions/cycle but can be much less. The fast…

Yep, I saw that go by, and a lot of my work is heavily influenced by Andrew Lines. But what I've been seeing is that QDI is really bad at arithmetic because the acknowledgement req…

> This article is 17 years old and I haven't seen any clockless designs in my professional experience in all of that time. Yeah, async design takes a while, and async chips don't t…

And the truth is that we are. Here is a bunch of data on Intel's processes that I've pulled together from various public domain sources. The yield curves are a very rough estimate,…

Heyo, I'm a PhD student in the field. I figured I can talk about its current status. First, here are various search terms: clockless, self-timed, delay-insensitive, latency-insensi…

Here is the counter argument to Stochastic Computing. http://csl.yale.edu/~rajit/ps/stochastic.pdf Basically, stochastic computing takes exponentially more time and energy to perfo…

Range-v3 seems to be solving a different problem. It seems to be introducing support for Pythonesque features like type-checking and list-comprehension. However, the algorithms tha…

Inheritance as implemented by Go provides for a different school of thought from C++. In C++, you define the taxonomy, then define the objects in relation to that taxonomy. In Go i…