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mwachs5

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Tue, Nov 29, 2016, 11:49 PM UTC
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About mwachs5

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Recent public activity

  1. comment
    Comment #13067297

    You're correct, you can access the 128MBit SPI Flash as any other read-only memory mapped memory -- you can execute out of it or load data (you can also write to it but need to use…

  2. comment
    Comment #13067271

    The RISC-V ISA defines different privilege levels: Machine, Hypervisor, Supervisor, User. It is possible for a chip to conform to the RISC-V Privilege Spec v1.9 by only implementin…

  3. comment
    Comment #13067258

    You are correct. This first FE310 chip on the HiFive1 board does not have a built in ADC/DAC.