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jrtc27

HN member
Joined
Wed, Feb 10, 2021, 3:08 PM UTC
HN karma
173
Public activity
47 items

About jrtc27

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Recent public activity

  1. comment
    Comment #45234183

    > Unfortunately, the time between free and revocation introduces a short-but-not-zero window for UAF bugs/attacks. This time gap is even explicitly acknowledged in the Reloaded pap…

  2. comment
    Comment #45206036

    You may wish to read what the current pure-capability CHERI Linux user ABI specifies for mremap(), because we (primarily Arm, in conjunction with us) have thought about this, and t…

  3. comment
    Comment #45205999

    > Does that study include enabling intra object overflow protection, or not? > > When I say that this optional feature would force you to change a lot more code I’m comparing CHERI…

  4. comment
    Comment #45194569

    Yeah you need a compiler, linker and OS. That's true of any security technology. CHERI may be more significant in that regard because it's a bigger rethink than just stuffing some …

  5. comment
    Comment #45194513

    No. The capability itself lives in normal memory intermingling with data just like any other pointer. There is no "capabilities memory", it is just memory. In MTE, you have the N-b…

  6. comment
    Comment #45192137

    Where studies suggest "a lot" is sub-0.1%. For example, https://www.capabilitieslimited.co.uk/_files/ugd/f4d681_e0f2... was a study into porting 6 million lines of C and C++ to run…

  7. comment
    Comment #45192097

    Can you elaborate on what you perceive as broken?

  8. comment
    Comment #45192088

    To reiterate what I've said elsewhere, CHERI does not need a whole parallel memory architecture, there is just one that gets a slight extension over a non-CHERI/MTE system to inclu…

  9. comment
    Comment #45192075

    Cambridge and Arm have made a joint statement that nothing that is essential to the deployment of CHERI ("capability essential IP") is being patented by them: https://www.cl.cam.ac…

  10. comment
    Comment #45192047

    > has a parallel capability stack There is one stack, the normal program stack that's normal main memory. > capability pointers If you use pure-capability CHERI C/C++ then there is…

  11. comment
    Comment #45192005

    That's not true. Capabilities are in main memory as much as any other data. The tags are in separate memory (whether a wider SRAM, DRAM ECC bits, or a separate table off on the sid…

  12. comment
    Comment #45191990

    We actually have ideas for how to combine the two; see section C.5 of https://www.cl.cam.ac.uk/techreports/UCAM-CL-TR-987.pdf

  13. comment
    Comment #41637144

    64-bit size_t is the same on Darwin as GNU/Linux (unsigned long), but uint64_t is not (Darwin defines it as unsigned long long, not unsigned long). Perhaps this is what you remembe…

  14. comment
    Comment #41188117

    Stop-the-world is only brief, to scan the register file of each thread and any other capabilities held in the kernel (asynchronous I/O, signal handlers, etc). Once done the entire …

  15. comment
    Comment #37797433

    CHERI can provide heap temporal safety to protect against use-after-free (really, use-after-reallocation; use-after-free is harmless until the point at which the memory is being us…

  16. comment
    Comment #37797422

    The hardware must, and does, ensure that the metadata (both addressable - bounds, permissions, etc - and non-addressable - the tag) is kept atomic with the address portion of the c…

  17. comment
    Comment #36095495

    The SoC IP used in ASUS's Tinker V deliberately violates the virtual memory spec in a way that affects userspace, rendering certain virtual addresses unusable. This region overlaps…

  18. comment
    Comment #36079434

    > Doing this at the actual hardware level (as you're implying with registers) doesn't really work - there's too much variation in how languages work, how languages work changes ove…

  19. comment
    Comment #34854885

    They don't ship with spacers?

  20. comment
    Comment #30437884

    Oh I know. Hardly inspires confidence; all of those examples are clear bugs declared features because of poor programming practices.

  21. comment
    Comment #30437371

    > The if directive is tricky to use, especially in location{} blocks. It often doesn’t do what you expect and can even cause segfaults. That's not user error. That's lazy programmi…

  22. comment
    Comment #30029876

    CHERI is not an actor system. It is a capability system aimed at memory protection. It can be used, like any other architecture, as a basis upon which to build an actor-based frame…

  23. comment
    Comment #30025575

    Your research on actor-based programming models has nothing to do with C/C++ spatial and temporal memory safety.

  24. comment
    Comment #30015610

    Yes it's non-zero, though https://www.capabilitieslimited.co.uk/pdfs/20210917-capltd-c... is a recent exploration of what it takes to port X11 and KDE to CHERI. Of the around 6 mil…

  25. comment
    Comment #30014076

    Yes, though "software" is rather broad; where exactly the bounds setting happens is important as if you get it wrong it allows malicious software to not set bounds and be able to a…