Viewing profile — jamesaross

If you like quines with a visual output like this, I recently taped out an self-reproducing ASIC which displays it's own Verilog source over VGA. https://github.com/jar/ttsky26a_pr…

I have a Radeon 7900 XTX 24GB and have been using the deepseek-r1:14b for a couple days. It achieves about 45 tokens/s. Only after reading this article did I realize that the 32B m…

An ARM supercomputer was already #1 in 2020 [0]. The Japanese Fugaku is also notable because it doesn't use GPUs to achieve high performance, but rather wide vector units on the CP…

I love these puzzles. GNU C supports a label as value for computed goto. This is useful for direct threaded dispatch. You trade off a branch instruction for an address lookup, but …

I wrote a short paper for HPEC that included some power and performance benchmarks and analysis on the HiFive Unleashed U540 SoC [0]. The SoC isn't open source as some suggest alth…

You don't have to worry too much about the low Earth orbit (LEO) sateillites as they will deorbit soon enough. My understanding is that there is also ongoing research into methods …

There are several efforts including VexCL [0] expression templates, OpenACC [1] preprocessor, Kokkos [2] template metaprogramming, SYCL [3], and many other similar projects. Parall…

Don't the inevitable methane leaks from natural gas create more of a GHG effect than the CO2 emitted from burning it? It's not just the environment disasters like in California, bu…

John Gustafson is on the board of Rex Computing, a small semi startup. They claim to have taped out last year, but I don't know if the chip has been validated or if it had posits i…

I may be somewhat qualified to speculate...Based on my experience with both Intel's and AMD's OpenCL implementations for their CPUs, I suggest that Intel has a much better vecorizi…

"In addition to ditching the requirement for regular password changes, the NIST is also advising sites to allow users to create passwords that are at least 64 characters long and i…

It applies to architectures with caches https://en.wikipedia.org/wiki/Cache_coherence Epiphany-V does not have caching. You explicitly move data around in software. Some software a…

I think a heterogeneous product was implied in that post, but I don't blame you for the confusion. The Epiphany-V is still homogeneous because of the time/funding constraints.

OpenSHMEM paper: https://arxiv.org/abs/1608.03545

It's backward compatible with Epiphany-III...so it's still Epiphany ISA with new instructions.

Consider that many instruction and data caches are at the 16-32 KB scale. It's obviously a big criticism of the microarchitecture but you have a linear tradeoff between number of c…