Viewing profile — henrikf
henrikf
HN member- Joined
- Sat, Jul 25, 2015, 3:08 PM UTC
- HN karma
- 385
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- 24 items
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About henrikf
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Recent public activity
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Comment #45864891
That's very impressive and I'm even more impressed if you can manage to sell tiles at that low price. PA looks suspiciously similar to SE5004L. I just needed some for my own projec…
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Comment #44217423
That's Leela Zero (plays Go instead of Chess). It was good for its time (~2018) but it's quite outdated now. It also uses OpenCL instead of Cuda. I wrote a lot of that code includi…
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Comment #43700617
It was from JLCCNC.
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Comment #43698431
There's not much software. PC calculates PLL register values for correct LO and source output frequencies, and transfers them to the FPGA which writes them to the hardware. FPGA ac…
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Comment #43697972
I have also had issues with motivation. I had a long pause from about 2019 to 2024 where I didn't work on personal electronics projects because I didn't have enough motivation. Thi…
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Comment #43697460
It's not on Github, but I do have schematic at the end of the blog post. vna2 is the previous version.
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Comment #43697331
Thanks for the submission. Author here if you have any questions.
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Comment #39934935
No, it needs to be done manually. It wasn't as tedious as it sounds though. Most of the pins are very close in delay already and there were just few traces that I had to adjust a l…
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Comment #39934666
The FPGA manufacturer has characterized all their package pin delays. It's possible to export a csv file with internal delays of the package for each pin from the FPGA design tool.…
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Comment #39934560
I actually didn't use any expensive test equipment, only oscilloscope and multimeter. Even design and simulation software was all open source. Expensive signal analyzer or spectrum…
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Comment #39933531
I built it to see if I could. I didn't have any particular use case in mind.
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Comment #39933454
Putting ground planes on top and bottom layers isn't usually done with high speed PCBs because components are there. There would need to be a cutout on the ground plane near every …
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Comment #39933394
That's a mistake in the text. You're correct that layers 2 and 5 are ground planes.
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Comment #35111404
What's open sourced here is the design kit. Designed chips need to be sent to IHP to be manufactured. SiGe isn't also that useful for military radar applications. Compared to SiGe …
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Comment #35108566
This is a very fast BiCMOS process with both MOSFETs and bipolar transistors. Some digital logic can be implemented with MOSFETs but since they are 130 nm it's not very competitive…
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Comment #29737181
Author seems to be looking to generate a blue noise texture for image sampling. I'm not familiar with them but it seems to be blue noise which also has uniformly distributed values…
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Comment #26922109
Even worse than error message is incorrect results. I worked on the OpenCL neural net evaluation backend used in Leela Zero and lc0 Go and chess bots. We had reports of several Ope…
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Comment #24249223
If I understand the methodology correctly this study seems to penalize unlimited plans quite a lot. In the linked methodology pdf they specify that the price for 1 GB of data for u…
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Comment #18783196
No need to wait for AlphaZero, you can try Leela Chess Zero today. From my experience the network without search has some blind spots, but the tree search is pretty effective in fi…
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Comment #14683304
On the same PSLV C38 rocket was Aalto-1, a 3U cubesat that has electrostatic plasmabrake that is a different de-orbiting experiment. It uses 100 m long hair thin wire that is elect…
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Comment #14061135
That's the rumours I was referencing. Deepmind hasn't confirmed anything yet.
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Comment #14060788
Deepmind released three AlphaGo vs. AlphaGo matches last year and around the new year AlphaGo played 60 games against top professionals online winning all of them. There have been …