Viewing profile — gluggymug

I believe Tcl scripts can help automate your FSBL and BSP changes. Pretty much everything you do in the GUI translates to Tcl commands.

There is a distinction between hardware emulators and FPGAs. Though hardware emulators such as Palladiums may use FPGAs inside them they don't work the same way in terms of validat…

At the SoC level, I don't think so. The reasons are numerous. I already gave a few. I will give another. Once you have to integrate hard IP from other parties, you cannot synthesis…

"If you're Intel or AMD making a processor, I bet FPGA versions of things are not terribly relevant because it doesn't capture a whole host of physical effects at the bleeding edge…

I don't agree. If it's non trivial, I don't have the more advanced verification tools such as UVM if I prototype via FPGA. The ability to perform constrained randomised verificatio…

As a veteran from the chip industry, I should warn you that all these suggestions about FPGAs for prototyping are not really done that much in the ASIC industry. The skills to do f…

I say "terribly-designed curriculum". Maybe engineers need to be introduced to the synthesis tools at the same time as the simulator tools. Simulating RTL is only an approximation …

If you are not an old fart like myself, you probably haven't used an actual Unix system but back in the days before the popularity of Linux, you'd see a lot of Solaris. You stuck t…

It's the experimental part of the high level language that is the problem. I agree you shouldn't teach it to students. It just leads them down a divergent path away from what is do…

"One thing that bit me when I was a complete n00b: assigning registers from within more than a single always block. On my simulator (at the time) it worked perfectly but the synthe…

The problem is that reset logic requires a bit of design rather than hard fast rules. Designs are getting larger these days with a lot of 3rd party IP that you can't assume use a p…

I agree about the parallelism but you have to understand the design methodology. Your example is somewhat pointless. The code is written to create the HW not the other way around. …

As a long time HW FPGA guy, I think you might want to take a look at the C projects again. I don't know whether Go has any advantages but the concept of a higher level language for…

>- jump to previous commands. >You just ran a command that printed a few pages, you want to scan from the first line. I think tmux might get you there. You bind a key to enter copy…

>Lack of electronics knowledge is what prevents most software developers from being productive in Verilog. A "better" language won't help. I am working in the FPGA industry. I defi…

How long have you had your current job? Median tenure is falling I believe. And employees in their mid-twenties and thirties have way lower tenure than those in their fifties. I th…

A few years ago there was an exposé on 457 abuse in the IT industry on national tv.( http://www.abc.net.au/7.30/content/2013/s3786315.htm ) Hence the "TCS" jab from empressplay. A …

The OA is talking a bit more specifically than just getting kids to play IMO. His title is Head of Innovation. Innovation is corporate-speak for actual company processes where they…

I think CASE 3 is going to be much faster due to the high performance AXI ports that Zynq's have.

Cool project. As someone from the FPGA industry, bigger projects just use your CASE 3 on a board to start prototyping. A Zedboard or similar. Cheaper version could be the Zybo. It'…

In Russia, that's not considered as an insult.

It's all about bad management. But it's about how they make plans and deadlines in the first place. If they don't spare a thought for what future problems can come up and make allo…

The comments on this thread have been more interesting than the article. I think the common theme is a push to innovate and take the next step in computer systems. If we scan this …

There's only one example there. http://www.aviduratas.de/lisp/lispmfpga/code.html

No way to specify different clocks or resets from what I can see. That's a massive limitation to your designs.