Viewing profile — domipheus

This is some great stuff, thanks for all the feedback - seriously. My VHDL experience is probably about 2/3 online tutorials, and they were all behavioural. The main aim of the art…

Hah, don't worry - I didn't think it was harsh. I've had no training/edu in HDL whatsoever, so this was a deep dive - I expected to be told I'm doing wrong! The end result is on FP…

Hey - author here. I'm not wanting to learn industry practices, it's a hobby project. May look into things like that later, though. The other article parts have the disclaimer that…

Thanks for the advice! I've been synthesizing a bit, fixing a few issues that at least didnt present when building for the simulator. I've yet to run it actually on hardware, thoug…

Cheers for the tips. I'll eventually move to Verilog, but as others point out, I think it's good to walk before I run. Regarding pipelining, I'm getting right on it - and the itera…

yes! I've not implemented conditional jump to an immediate offset yet, so you need the branch target in a register.

Hey folks, writer here. Thanks for the great comments! Part 2 is already up talking interrupts (same blog) and i'll be cheating even more when the SD card interface comes online.