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deRerum

HN member
Joined
Wed, Aug 24, 2016, 12:53 PM UTC
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16
Public activity
7 items

About deRerum

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Recent public activity

  1. comment
    Comment #21904405

    Yes the examples you have all have multiple processing elements but they are vector processors. I was talking about simple and cheap scalar processors. GPUs rely on symmetry to sim…

  2. comment
    Comment #21888904

    That is an interesting idea. I wonder if a small processor core could be stamped out on an fpga and hundreds of small processors can run simultaneously. Then I wish my c++ objects …

  3. comment
    Comment #19828816

    Anyone can prefetch data into the cache, but letting programmers control cache eviction would open the door to all kinds of user errors which would kill performance.

  4. comment
    Comment #19823229

    A 10Mhz processor has a clock cycle of 100ns (0.1 millionths of a second). Those are just rough representative numbers I picked...any particular RAM delays would be different and t…

  5. comment
    Comment #19822909

    In the past (like around the time most programming languages were invented) memory speeds were faster than processor speeds. So all variable accesses were instantaneous. Languages …

  6. comment
    Comment #19822851

    GPUs are latency hiding engines...they address the mismatch between processor clock speeds and memory latency by a unique scheme. Since they can’t improve memory latency, instead t…

  7. comment
    Comment #12351663

    Agreed. Way back when, when I was young and stupid and knew everything, my head was full of logic puzzles and programming tricks. So it was easy to solve them in an interview. But …