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Often but not always. For most newer FPGAs, routing is the main source of delay on the critical path, not logic. So if the synthesis tool lowers the logic depth, but does so in a w…

Look at the hashes of the commits

Henrik has a blog post about a SAR radar he made from a couple years ago that goes into a bit more detail about how it works https://hforsten.com/synthetic-aperture-radar-imaging.h…

With price increases over the last couple of years from inflation, retailers have shown they are more than capable of doing so already. So yes

That is unlikely to work. Centrifugal separation works when the fluid you're trying to separate is a suspension of either solids or multiple fluids that do not mix (such as oil or …

The article only briefly mentions crypto and is instead about products like Paypal, Cashapp, Venmo, and the like.

Clones of the 8051 are pretty popular in that scenario, I know for sure at least one mouse manufacturer uses them and probably a ton more

> and replacing them with just straight up floating point calculation Not only that, the diff replaces 100-150 lines of code with 3. That's the kind of pull request I can only drea…

On gcc 13, the difference in assembly between the min(max()) version and std::clamp is eliminated when I add the -ffast-math flag. I suspect that the two implementations handle one…

x86 was designed/developed back when a lot of programs were written in assembly, so writing assembly for it isn't terrible especially if you focus on the simpler instructions. Thin…

The DRAM chips themselves are asynchronous (there's no clock signal connected to the RAM chip), however they expect a sequence of operations with specific timings in order to work.…

Thanks for the link, that was extremely interesting to read

Well for one, not everyone is able to eat eggs or dairy. For these people (such as myself), there's not an alternative besides a plant based substitute. To me it's pretty exciting …

Generally yes. Sending morse is much easier than receiving it. Once you are comfortable receiving morse at 25wpm for example, the amount of practice needed to send at that speed is…

Logic Gate != Transistor and FPGA LUT != Logic Gate FPGA LUTs are quite sophisticated, the LUTs in both Xilinx and Intel's latest offerings are able to implement an arbitrary boole…

I am not sure if this generalizes to non-64 bit platforms, but in my experience using size_t gives you unsigned integer indexing without requiring overflow checks (as it's normally…