Viewing profile — caxap
caxap
HN member- Joined
- Fri, Nov 13, 2009, 11:10 AM UTC
- HN karma
- 133
- Public activity
- 26 items
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About caxap
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Recent public activity
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Comment #49077813
I think unsafety, distillation, and China catching up in chipmaking are inevitable. Just like how it was inevitable for SoTA LLMs to ignore copyright. The actual challenge isn't ho…
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Comment #47649864
If this article was written a year ago, I would have agreed. But knowing what I know today, I highly doubt that the outcomes of LLM/non-LLM users will be anywhere close to similar.…
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Comment #47302562
There are no tricks because you're too smart to fall for your own tricks. The one thing that works is the time buffer between your future self and now. The real challenge is to ove…
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Comment #6930117
I don't think Adi Shamir is interested in writing fake articles and a fake paper about the same topic: http://www.tau.ac.il/%7Etromer/papers/acoustic-20131218.pdf
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Comment #6866727
And if everyone starts paying to highlight their ads, then those that don't pay will stand out.
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Comment #6559802
Yes, the government knows how to lie with statistics. Since the introduction of the so-called "one-euro jobs", the unemployment has gone down only because people who took such jobs…
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Comment #5533277
Just send an email to this woman---she might send your mac back! My wife just told me that Iranians, like the ones in this case, don't like to use stolen things.
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Comment #5282663
Thanks for your insights, there is a lot of value for me in your post. I have an intense dislike for VHDL. I have yet to meet an engineer who likes it! I hate it with passion, but …
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Comment #5282371
That's perfectly possible, but only the newer FPGAs are big enough to store the whole image in the registers. If I had a bigger FPGA, I would not bother doing all this memory juggl…
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Comment #5282160
No, I am not one of them :) Thanks for the reference! I am drawing my inspiration from Bailey, and more recently Ma et al. They label an image line by line and merge the labels dur…
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Comment #5281098
Someone just needs to design a high level language that can be synthesised; something akin to a python of the FPGA world if you will. The advantage of FPGAs is that they allow nont…
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Comment #5280897
At the moment, I am writing some computer vision code in VHDL. A part of the circuit will perform connected component labeling (CCL) on incoming images, because I want to extract s…
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Comment #3862544
Good way to start is to learn one of the hardware description languages. I liked the book by Pong P. Chu "FPGA Prototyping by VHDL Examples: Xilinx Spartan-3 Version". The same boo…
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Comment #3718270
Wouldn't open data make a bus company more popular to another one that does not release its data to the public? But here in Colone there is only one bus company, which might be the…
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Comment #3406045
Recently in Germany many banks introduced a new "security" feature that allows you to receive your TANs per SMS in order to do online transactions. The TANs are sent in plain text.…
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Comment #3199317
"I think we need more and more materials out there on good TDD and OOD..." Which materials do you recommend?
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Comment #1548854
Now it is legal to do what everyone was doing already--to hack our own stuff. It is fascinating to see how laws catch up to the norm. Just wonder why it was illegal in the first pl…
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Comment #1541731
Reinforcement learning was applied after the basic model was initialized with imitation. Maybe that can partially explain the small number of steps.
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Comment #1214482
Next time when I want to publish a paper, I will take the work of someone else, claim that it's unreadable and difficult to understand, "clarify" parts that were unreadable, and pu…