Viewing profile — caisley
caisley
HN member- Joined
- Sun, Jan 25, 2026, 1:21 PM UTC
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- 11
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- 7 items
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About caisley
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Recent public activity
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Comment #46757833
Wow, awesome thanks for the details! I have once or twice on projects added extra gates as fillers in some 28nm mixed-signal designs for metal layer re-work, but I had no idea that…
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Comment #46757715
Modern commercial image sensors are made in process nodes down to 28nm [0], and for visible light have pixels measuring 0.7-1.5 μm. At [0] there a diagram which gives a feel for wh…
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Comment #46755667
Can I ask how often you guys end up doing gate-level netlist ECOs, instead of re-running synthesis when you're close to a deadline? Also, post-fabrication, if a mistake is found, h…
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Comment #46755219
Hey, I'm not a system-level digital designer, but for government-level initiatives to provide 130nm and 65nm fabs for public benefit, yes it exists! From the 2025 Free Silicon Conf…
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Comment #46755141
I work in custom CMOS image sensor design, targeting scientific imaging applications like electron microscopes, X-ray microscopy, and detectors for high-energy physics. Our designs…
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Comment #46753977
You're right that most professional designers historically haven't cared about open source tooling. But this is starting to change, largely because of the recent existence of open …
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Comment #46753946
Yes, actually 180 nm still represents a sizable amount of the market, in terms of volume! In more niche applications where chips contain lots of analog functionlity, you can still …