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bunnie

HN member
Joined
Sat, Mar 09, 2013, 3:15 PM UTC
HN karma
2,000
Public activity
192 items

About bunnie

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Recent public activity

  1. comment
    Comment #49126494

    UV doesn't have sufficient penetration depth to cause a lot of trouble for the chip. Of course at some intensity, any kind of light becomes problematic but for any exposure level t…

  2. comment
    Comment #48380375

    Just another +1 for fastmail, long time user, really pleased with the service. They do one thing and they do it well, and they charge a fair price for the value delivered.

  3. comment
    Comment #48370698

    Actually this chip does have ECC on many of the SRAMs - hence the bit widths of 36 bits instead of 32 in many cases. If it's a concern that the ECC is being used as storage, I'd su…

  4. comment
    Comment #48053388

    I've run power for a 100-person theme camp in the past. According to the logs, we burned an average of 36.8 gallons per day, or 1.4 liters/person/day (we ran the generator for 9 da…

  5. comment
    Comment #47750684

    Anecdotally, from when I did first amendment activism, my lawyers would always recommend that I stick to doing it with dead tree editions as much as possible. Literal book banning …

  6. comment
    Comment #47504241

    The core ID definitely didn't need to be in a register, but the elapsed clocks since reset is actually really handy. Having this in the hot path allows me to build a captouch senso…

  7. comment
    Comment #47502777

    Yah, it is - the text is first posted to the campaign, and then copied to my blog for long-term archival in a domain that I control, sans the sales pitch.

  8. comment
    Comment #47502718

    It's hard to know for sure, because we don't have access to the PIO's implementation, but I suspect that the PIO is "not small". That being said - size isn't everything. At these s…

  9. comment
    Comment #47502675

    I suspect there are tricks to get higher rates, for sure. And hopefully once we see a library of applications forming, we can make informed decisions about what extensions and feat…

  10. comment
    Comment #47499057

    USB 12Mbps is one of the envisioned core use cases - the Baochip doesn't have a host USB interface, so being able to emulate a full-speed USB host with a BIO core opens the possibi…

  11. comment
    Comment #47498988

    FIFO is 8-deep. I did fail to mention that explicitly in the article, I think. The depth is so automatic to me that I forget other people don't know it. The deadlock possibilities …

  12. comment
    Comment #47498980

    Correct, actually most programs I've written for the BIO are in assembly. The C compiler support is a relatively recent addition, mostly to showcase the possibilities of doing high…

  13. comment
    Comment #47498971

    If there's a single rising edge on the bus that you can use as quantum trigger, then, the reads turn into as series of moves into a FIFO, and the response can be quite fast. The qu…

  14. comment
    Comment #47493733

    It depends a lot upon where the processing is happening. For example, you could do something where all the data is pre-processed and you're just blasting bits into a GPIO register …

  15. comment
    Comment #47493601

    As a side note about speed comparisons - please keep in mind the faster speeds cited for the PIO are achieved through overclocking. The BIO should also be able to overclock. It won…

  16. comment
    Comment #47493439

    Agreed! The PIO is great at what it does. I drew a lot of inspiration from it.

  17. comment
    Comment #47493434

    The idea of the wait-to-quantum register is that it gets you out of cycle-counting hell at the expense of sacrificing a few cycles as rounding errors. But yes, for maximum performa…

  18. comment
    Comment #47493270

    Actually, the PIO does what it does very well! There is no "worse" or "better" - just different. Because it does what it does so well, I use the PIO as the design study comparison …

  19. comment
    Comment #47492917

    Hello again HN, I'm bunnie! Unfortunately, time zones strike again...I'll check back when I can, and respond to your questions.

  20. comment
    Comment #47386655

    To clarify - RISC-V is an architecture, and that is an open specification. However, as an architecture it only specifies things like, what the instructions are and their encodings.…

  21. comment
    Comment #47384836

    Hmm...it's not just the speed. Actually, the I/O pads themselves are closed source because there's a lot of process magic in them - from the ring seals to the ESD protection, the f…

  22. comment
    Comment #47384819

    thank you~~

  23. comment
    Comment #47384817

    I imagine sel4 could be possible, but I haven't done any specific checking for compatibility. Current draw - depends on the operating mode, etc. A dabao board with all its regulato…

  24. comment
    Comment #47384791

    It all depends on the node. Masks in 130nm are maybe in the $10k's-$100k's range. Masks for the latest TSMC nodes might cost you $30-40 million per set. The masks are pretty much a…

  25. comment
    Comment #47384770

    There's actually a whole space of shared-mask tapeouts. You might have heard of TinyTapeout [1]/LibreLane [2] and the general concept of "MPW" masks - multi-project wafer masks. Th…