Viewing profile — avnd

Hi HN! I made this little web app for formal equivalence checking of Verilog that runs totally locally in the browser. I initially wrote it for myself to (confidently) rewrite clum…

Pretty cool! Have you heard of PyRTL? https://ucsbarchlab.github.io/PyRTL/

This was a blog I wrote last year while I was in college! I want to work on UART over GPIO next, and would love any feedback on my first post! Some resources on the topic I found h…

That’s a very ambitious project to say the least and I’ll bite! Please elaborate Also, have you checked out the OpenROAD[1] project? It’s a pretty impressive open source RTL to GDS…

I work at an FPGA company so anything FPGA-related would be cool :) To capture the most popular topics, you can grab the topics of the top N most attended academic conferences as a…

Cool! Have you considered tagging/sub-categorizing? That would be helpful to organize topics. I’ve often seen papers have a list of keywords somewhere on the first page that could …

The open source tooling isn’t perfect but it’s growing fast! I work in this space and recommend checking out the OpenROAD[1] project, which has full synthesis and pnr for select FP…