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asdf_

HN member
Joined
Wed, May 17, 2017, 10:15 PM UTC
HN karma
20
Public activity
7 items

About asdf_

[ my public key: https://keybase.io/asdfsadfovs; my proof: https://keybase.io/asdfsadfovs/sigs/hbf0E7CjMGnvYAqJY2Z35vzy1314IptoNoBn8HKw9wM ]

Recent public activity

  1. comment
    Comment #14368559

    Sure, no argument there. For Google, producing and using TPUs, is probably cheaper than buying nvidia hardware.

  2. comment
    Comment #14367078

    The interconnect hardware is present on the dgx-1 board. The point of my previous comment is that it doesn't make sense to compare an entire TPU module (containing 4x TPUs) to a V1…

  3. comment
    Comment #14364441

    A single V100 board is vastly smaller than a TPU module with 4 TPU chips. The closest comparison in terms of size would be 1 Volta DGX-1 (8x V100s) compared to 2 TPU modules (8x TP…

  4. comment
    Comment #14364432

    A single V100 board is vastly smaller than a TPU module with 4 TPU chips. The closest comparison in terms of size would be 1 Volta DGX-1 (8x V100s) compared to 2 TPU modules (8x TP…

  5. comment
    Comment #14363472

    A single chip is only 45 TFLOPS. It is 180 TFLOPs per module (4x TPU chips): https://arstechnica.com/information-technology/2017/05/googl...

  6. comment
    Comment #14363337

    Google's 180 teraflop number is for a module, which contains 4 TPU chips. Meaning each TPU is 45 teraflops. See: https://arstechnica.com/information-technology/2017/05/googl...

  7. comment
    Comment #14363318

    It is actually 45 teraflops per TPU2 chip and 180 teraflops for a module (4x chips): https://arstechnica.com/information-technology/2017/05/googl... V100 is 120 teraflops of tensor…