Viewing profile — ajenner
ajenner
HN member- Joined
- Fri, Jul 29, 2011, 4:23 AM UTC
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About ajenner
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Recent public activity
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Comment #48140825
As trollbridge said, there isn't enough VRAM in the CGA to have 200 rows of 80 columns (2 bytes per cell - one for character and one for attribute). But it can be done in 40-column…
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Comment #46961249
I haven't published it yet as there are still some rough edges to clear up, but if you email me (andrew@reenigne.org) I'll send you the current work-in-progress (the same one that …
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Comment #46152455
I wrote a program called xtce-trace ( https://www.reenigne.org/software/xtce_trace.zip ) to do just this (albeit non-interactively - you just give it a program and it will generate…
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Comment #35446830
It's not - the "DA" means that the write happens to the ES segment, while "DS" means that the read happens from the DS segment. The use of different segments for the source and des…
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Comment #33856427
Yes, it pops the stack value into the CS register. But it doesn't update the PC as well - it'll continue to point to the offset (in the old CS) of the instruction after the "POP CS…
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Comment #33397779
There's a POP instruction in the loop that pops to a memory location addressed by a register. When that register contains the address of the final JMP instruction, the latter gets …
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Comment #33393036
A more recent example of an finite loop with no exit condition can be found in the credits section of the 2015 demoscene production "8088 MPH". The loop (which can be found at http…
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Comment #32442514
I used the DOSBox debugger to debug several of the effects during the making of Area 5150, but other than that I used real hardware. 86Box is probably the most accurate one at the …
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Comment #32425763
Most of the tricks in the demo should work unmodified (or could be made to work) on most CGA implementations of the era. Some clones had slightly different font ROMs so it would lo…
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Comment #32422226
Yes, I'm reenigne from the demo. Feel free to contact me at andrew@reenigne.org. I'm not sure what you're doing with the colour mixing on that page but I'm wondering if you're just…
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Comment #32418935
There's a difference between linear interpolation of sRGB values (what you're doing on your page) and linear interpolation of linear RGB values (which gives better results). This i…
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Comment #32413932
As I remember it, the term "XT class" was used back in the day to distinguish between "AT class" PCs and those prior - i.e. to mean an IBM PC, XT or comparable machine. So (weirdly…
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Comment #32413742
The C000 segment was used for the EGA/VGA extension ROM. I'm guessing that using D000-EFFF would be unnecessary (because of the planar addressing squeezing 256kB of video memory in…
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Comment #32412697
The programmatic transitions between still images use linear RGB space, which is the correct way to interpolate between two colours. The maths behind it is pretty simple - essentia…
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Comment #32410361
Thanks! The 3D hills are no less 3D than any other 3D scene displayed on a 2D monitor. It's a heightmap (of a real place) rendered with correct perspective. Getting the samples to …
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Comment #32410313
The demo is about 500kB at the moment. We're hoping to fit the final version onto a single 360kB floppy but didn't quite get that working in time for the party. A 3.5" floppy shoul…
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Comment #32410298
I did actually use this debugging technique while making a couple of the effects of Area 5150 (the lake effect at the end, and the one two effects before that).
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Comment #24392358
The b and t files are the bottom and top halves of the 9 "chunks" of the decoder above the main microcode ROM. The l* and r* files are the left and right halves of the four horizon…
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Comment #24389429
The translation.txt file is the contents of the translation ROM which tells the CPU where in the microcode to go for long jumps, calls and EA decoding. The key.txt file has the det…
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Comment #24386366
I don't think there's anything on the chip that could compute a checksum of the microcode ROM contents. It could be some kind of copyright message perhaps, though I don't know how …
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Comment #24386317
I have just learned from dreNorteR on VCF that it no effect on a 286 but has a different, unexpected, and useful effect on a 186! http://www.vcfed.org/forum/showthread.php?76657-80…
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Comment #24385972
Probably not entirely a coincidence - Ken Shirriff is doing a series on the 8086 which may account for at least one of the other articles you've noticed. My disassembly was only po…
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Comment #24385807
Microcode instruction sets have different engineering trade-offs to the user-visible ISA. In microcode, memory bandwidth isn't such an issue so microcode instructions can be relati…
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Comment #24385553
According to https://en.wikipedia.org/wiki/Intel_8086 : "The architecture was defined by Stephen P. Morse with some help and assistance by Bruce Ravenel (the architect of the 8087)…
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Comment #24385513
Yes, exactly - the logic that implements the simpler instructions directly as special-purpose gates rather than microcode.