Viewing profile — Bulat_Ziganshin

"A lot" is quite a bit of an overstatement. I don't remember the exact numbers, but my program, which updated stats (about 100 chars + '\r') every 0.1s, was becoming noticeably fas…

No, but LPDDR means soldered, there are no LPDDR dimms

They didn't say that Mediatek made the cpu sores. Grace is NVidia's own cpu arm cores. I bet that Mediatek made other parts of SoC necessary for a notebook

I think that Nvidia made GPU and CPU, and Mediatek made other parts of SoC necessary for a notebook. Grace is Nvidia's own CPU ARM core

They compare HGEMM implementations. At least CUBLAS has HGEMM functions. HGEMM means half-precision (i.e. FP16) general matrix multiplication

just to make you even more paranoid - zen2/4 (and probably e-cores and zen5) can rename memory operands too (you start to do strange things when Intel limits you to 16 registers)! …

what about 8-bit ANDN? SHL essentially uses CL, so it may be because 8-bit subregister of "constant register" isn't present on the bypass network

I once searched github for simd libraries, sorted by popularity, and added most popular of them to my list: https://github.com/stars/Bulat-Ziganshin/lists/simd indeed, highway is t…

with m/t, the algorithm is memory-bound, so the performance should be determined strictly by the memory throughput

JOIN SQL operation is another usecase

it's how Google managed to convince young people all over the world to start reading those crappy A&DS books

Intel shifts anyway mask out higher bits of CL, this hurts sometimes e.g. when you need to shift by 1..64 bits

high-performance sorting algos do either merging or partitioning. I.e., you merge R input streams into one, or split one input stream into R (for quick, radix and sample sort). 1. …

higher throughput means we can serve more people, not that anyone will be served faster. it's like a multi-lane highway

because THIS code becomes faster once RCX is saved and restored during the interrupt call

we set CX only once and then use it 10000 times. the problem is not the slow calculation of CX per se, but the slow shift once we got CX from the renamer

add3 operation will have 3 inputs, though. do we have other integer operations with 3 64-bit inputs?

except that we need max() here :)

maybe, the bypass network doesn't include these "constant registers"? a bit like zen5 where some 1-cycle SIMD ops are executed in 2 cycles, probably for shortcomings of the same ne…

afaik, 7-zip filters can't have multiple inputs (at the encoding stage). multiple outputs are necessary for filters that output multiple independent data streams such as bcj2. and …

only in indirect way - simpler format could allow to find another real maintainer *or even continue to maintain it himself), because it has less features. but I think xz won the li…

the installation process itself executes xz scripts which can make any (?) modifications to the system

1. both lzip and xz are using lzma compression library internally, so there is no difference in their compression ratio/speed 2. lzma compression is LZ + markov chains, while zstd …

even worse, I have Punto switcher that automatically switches language when I start typing. With default config, it changes latin c to russian one because russian language includes…

my understanding is that any Debian/RPM-based Linux running sshd would become vulnerable in a year or two. The best equivalent of this exploit is the One Ring. So the really strang…